Resume

Current Position

Associate Professor

Delft University of Technology
July 2015 - now

Affiliations:

Main activities:

  • Research:
    • Cryogenic CMOS electronics
    • Noise-based temperature sensors and references
    • High-resolution energy-efficient Zoom-ADC for dynamic signals
    • Temperature sensors based on the thermal diffusivity of silicon
  • Supervision of M.Sc. and Ph.D. candidates.
  • Teaching activities.

Work Experience

Assistant professor (tenured)

Delft University of Technology
Dec. 2018 - Feb. 2020

[cardResume jobtitle="Assistant professor" company="Delft University of Technology" date="July 2015 - Nov. 2018"]

[cardResume jobtitle="Postdoctoral Researcher" company="Delft University of Technology" date="Sep. 2013 - June 2015"]

Main research activities: smart temperature sensors (thermal-diffusivity-based, noise-based and bandgap-based); high-resolution energy-efficient Zoom-ADCs; integrated wind sensors, cryogenic CMOS electronics. Supervision of M.Sc. and Ph.D. candidates. Teaching activities.

Highlights:

  • World’s smallest temperature sensors [1, 2]
  • Zoom-ADC with state-of-the-art energy and area efficiency
    [3]

Principal Scientist

NXP Semiconductors, Eindhoven (NL)
Oct. 2011 - Aug. 2013

Project leader of a research project (5 people) investigating new solutions for NXP magnetic sensors for automotive. Research in the field of analog/mixed-signal sensor front-ends: system design and simulation; definition of specifications; circuit design (schematic and layout); evaluation.

Highlights:

  • Design of the world’s smallest instrumentation amplifier with a 13.3x area improvement over state-of-the-art (2 channels, 0.03 mm² per channel, offset < 17 µV, channel gain matching <0.1%). Presented at ISSCC 2014 [4].
  • Design of a 3-channel ΣΔ ADC with the smallest chip area among ΣΔ in mature technologies with similar performance (0.03 mm² per channel, 86-dB DR in 20-kHz BW, 0.2% gain mathcing) [5].
  • Design of MEMS microphone interface.World’s first AC biasing scheme for MEMS microphone. Presented at ISSCC 2013 [6].
  • Design of an ABS sensor front-end for a new product. Led to two patent applications.


Research Scientist

NXP Semiconductors, Eindhoven (NL)
Jan. 2010 - Sep. 2011

Research in the field of analog/mixed-signal sensor front-ends.

Marie Curie Fellow

NXP Semiconductors, Eindhoven (The Netherlands)
2006 - 2011

Research and design of analog/mixed-signal integrated circuits in the field of fully integrated frequency references, temperature sensors and wireless sensor networks.

Highlights:

  • Design of the world’s most accurate temperature sensor in advanced CMOS, 10x improvement in accuracy over state-of-the-art
  • Design of a mobility-based frequency reference. Resulted in a book [7], 2 invited JSSC papers [8, 9] and 5 conference presentations [10, 11, 12, 13, 14]. Recognized expertise is proven by invitation to a forum on frequency references at ISSCC 2013.
  • Design of an instrumentation amplifiers for biopotential applications. Presented at ESSCIRC 2010, ASSCC 2010 and published in JSSC [15, 16, 17].


Intern

EPFL, Lausanne (Switzerland)
Jun. 2005 - Oct. 2005

Research and design of RFID systems and RFID readers at the LEG laboratory at EPFL.

Education

Ph.D. in Electrical Engineering

Delft University of Technology
Oct. 2011

Ph.D. in Electrical Engineering from Delft University of Technology. Thesis title: “Mobility-based Time References for Wireless Sensor Networks.” Advisors: Prof. K.A.A.Makinwa (TU Delft), Prof. L.J.Breems (TU Eindhoven).

Master of Science

Sant'Anna School of Advanced Studies, Pisa (Italy)
Jun. 2006

Graduated (Licenza specialistica) at Sant’Anna School of Advanced Studies; 100/100 summa cum laude. Thesis title: “Design of an interrogator for UHF RFID system with emphasis on backscattering modulation analysis.” Full scholarship, for a programme of studies in engineering.

Master of Science

University of Pisa (Italy)
Apr. 2005

Graduated in Laurea Specialistica in Ingegneria Elettronica (Master’s Degree in Electronic Engineering) at University of Pisa, 110/110 summa cum laude. Master’s thesis on CMOS fully integrated Gm-C filters for very low frequency applications at “Microelectronic technologies and microsystems” center of University of Pisa and ST-Microelectronics in Pisa.

Bachelor of Science

University of Pisa (Italy)
Jul. 2003

Graduated in Ingegneria Elettronica (Bachelor’s Degree in Electronic Engineering) at University of Pisa, 110/110 summa cum laude, with a dissertation on real-time computation on a DSP platform of audio streams in a Bluetooth wireless network for motorcycles.

State Exam

Jun. 2006

State exam at Liceo Scientifico “A.Einstein” in Teramo (Italy); final grade: 100/100.


Scholarships, grants and prizes


International activities

Invited talks at international scientific conferences

  • “Cryogenic CMOS interfaces for large-scale quantum computers: from system and device models to circuits,” tutorial at IEEE European Solid-State Circuit Conference, Krakow, Poland, 23 2019.
  • “Cryogenic CMOS Interfaces for Quantum Computers,” workshop presentation at IEEE RFIC Symposium, Boston, MA, 2 June 2019.
  • “Cryogenic CMOS Interfaces for Large-Scale Quantum Computers,” Heraeus seminar “Engineering a Scalable Quantum Information Processor,” Bad Honnef, Germany, 25 Apr. 2019.
  • Keynote presentation, “Cryogenic electronic interfaces for quantum computing,” Smart System Integration Conference, Barcelona, Spain, 11 Apr. 2019.
  • Keynote presentation, “Cryogenic CMOS Interfaces for Quantum Computers,” 13th National Colloquium of GDR SoC-SiP (national French research group on System-on-Chip and System-in-a-Package), Pierre et Marie Curie Campus of Sorbonne University, Paris, France, 13 June 2018.
  • “Cryo-CMOS Electronics for Scalable Quantum Computing,” Silicon Quantum Information Processing (SiQIP) 2017, Lancaster, UK, 11 Sep. 2017.
  • “Cryo-CMOS electronic control for scalable quantum computing,” 2017 DAC – Design Automation Conference, Austin, TX, 21 June 2017.
  • “CryoCMOS Hardware Technology – A Classical Infrastructure for a Scalable Quantum Computer,” 2016 ACM International Conference on Computing Frontiers, Como, Italy, 17 May 2016.
  • “Frequency references for Internet of Everything,” short course at ISSCC 2016 – International Solid-state Circuits Conference, San Francisco, CA, 4 Feb. 2016.
  • “Self-Calibration techniques for Precision Sensing Applications,” forum on “Data-Converter Calibration and Dynamic-Matching Techniques” ISSCC 2016 – International Solid-state Circuits Conference, San Francisco, CA, 31 Jan 2016.
  • “Fully-Integrated Frequency References in CMOS,” forum on ”Frequency generation and clock distribution,” ISSCC 2013 – International Solid-state Circuits Conference, San Francisco, CA, 21 Feb. 2013.
  • “A Frequency Reference for Crystal-Less ULP Wireless Sensor Networks,” ProRISC 2008, Veldhoven, The Netherlands, 27 Nov. 2008.

Outreach-focused talks

  • “Quantum computing?,” ECP meeting: Quantum computing en quantum internet, Delft, The Netherlands, 4 Apr. 2019.
  • “Cryogenic CMOS Interfaces for Large-Scale Quantum Computers,” Headquarter of Keysight Technologies, Santa Rosa, CA, 19 Feb. 2019.
  • Series of talks (“Cryogenic CMOS Interfaces for Large-Scale Quantum Computers”) at IEEE Solid-State Circuit Society (SSCS) chapters as SSCS Distinguished Lecturer:
    • SSCS Silicon Valley Chapter, held at Texas Instruments in Santa Clara, California, 21 Feb. 2019.
    • SSCS Benelux Chapter, held at KU Leuven in Leuven, Belgium, 5 Dec. 2018.
    • SSCS Oregon Chapter, held at Intel in Hillsboro, Oregon, 6 Nov. 2018.
  • “Frequency references for Internet of Everything,” Texas Instruments, Santa Clara, CA, 28 Jan. 2016.
  • “Sensing temperature on nanometer CMOS chips,” Headquarter of Apple Inc., Cupertino, CA, 28 Jan. 2016.

Collaborations

Dr. J.S. Clarke and Dr. S. Pellerano, Intel, Hillsboro, OR (2015 – now)

Research on cryogenic circuits for quantum computing applications and the fabrication of cryogenic mixed-signal circuits in Intel CMOS technology. Resulted in one publication (currently in review).

Prof. E. Charbon, EPFL, Switzerland (2017 – now)

Research on cryogenic RF circulators in standard CMOS technology for quantum computation, resulting in one accepted publication (RFIC Symposium) and one invited journal publication (JSSC, currently in review).

Dr. G. Villar Piqué, NXP, The Netherlands (2019 – now)

Research on sub-nanowatt oscillators for low-power high-efficiency power converters.

Prof. P. Bruschi, University of Pisa, Italy (2013-2014 / 2019 – now)

Research on the precision CMOS amplifiers for sensing applications, resulting in a publication (ISSCC 2014).

On-going research on cryogenic high-speed analog-to-digital converters.

Dr. C. Degenhardt, Forschungszentrum Jülich, Germany (2018 – now)

Research on the impact of the imperfections of the electronic interface on the performance of singlet-triplet spin qubits, resulting in one publication (in preparation).

Prof. A. Vladimirescu, UC Berkeley, CA (2015 – now)

Research on the modeling of CMOS transistors operating at cryogenic temperature, resulting in a publication (1x Journal of the Electron Devices Society, 3x European Solid-State Circuit Conference).

Dr. Y-H. Liu and M. Ding, imec, The Netherlands (2016 – 2018)

Research on ultra-low-power fully integrated frequency references, resulting in a publication (Solid-State Circuit Letters) and a patent application.

Dr. E. Prati, CNR (National Research Council), Italy (2015 – 2017)

Research on CMOS-based quantum computer architectures, resulting in two publications (npj Quantum Information, Applied Physics Express).

Dr. G. Ferrari, Politecnico di Milano, Italy (2015 – 2017)

Research on cryogenic platforms for quantum computing applications using off-the-shelf components including FPGA’s, resulting in a publication (Review of Scientific Instruments).

Prof. B. Nauta, University of Twente, The Netherlands (2006 – 2009)

Research on ultra-low-power transceiver for wireless sensor networks, resulting in several conference (2x ISSCC, 4x European Solid-State Circuit Conference) and journal publications (4x JSSC, 1x Transactions on Circuits and Systems).

Journal editor

Associate Editor, IEEE Transactions on VLSI Systems (TVLSI), Jan. 2019 – now.

Conference activity

  • Member of the technical program committee of the IEEE RFIC Symposium in the sub-committee “Emerging technologies,” (2018 – now)
  • Organizer of the special session “Towards Large-Scale Quantum Computers Session” at the 2019 International Symposium on Circuits and Systems held in Sapporo, Japan on May 28th
  • Chair of the session “RF-Inspired Emerging Technologies and Applications” at the 2019 IEEE Radio Frequency Integrated Circuits Symposium held in Boston, MA, USA on 3 June 2019.

Professional membership

Senior member of IEEE (Institute of Electrical and Electronics Engineers), 2017 – now.

Outreach

  • “News and views” article in Nature electronics: F. Sebastiano, “Scalable read-out schemes for qubit,” Nature electronics, vol.2, no.6, pp. 215-216, June 2019.
  • Webinar organized by the IEEE Solid-State Circuit Society (SSCS), “Cryogenic CMOS Interfaces for Large-Scale Quantum Computers,” 27 June 2019.
  • Lecturer for the edX MOOC (Massive Open Online Course) “The Building Blocks of a Quantum Computer: Part 2” to introduce quantum computing to a broader audience.
  • Popular-science article about my research on the magazine of the TU Delft Electrical Engineering study association (ETV): F. Sebastiano, R. Incandela, “Cool down your microchips to build a quantum computer… and do more!,” Maxwell, no. 21.1, pp. 11-13, Nov. 2017.

Academic qualifications

  • Italian National Scientific Qualification for the role of Associated professor for Electronics, valid from 28/08/2018 to 28/08/2024.
  • University Teaching Qualification (Basis Kwalificatie Onderwijs, BKO) awarded by the federation of the four Dutch universities of technology (4TU), it certifies the required level of pedagogical competencies for university teachers, 2017.

Teaching

I have been instructor or co-instructor of several courses at TU Delft:

  • “Analog circuit design fundamentals,” MSc, academic years 2019/20.
  • “Electronics for quantum computation,” MSc, academic years 2015/16, 2016/17, 2017/18, 2018/19.
  • “Analog CMOS Design I,” MSc, academic years 2015/16, 2016/17, 2017/18, 2018/19.
  • “Analog CMOS Design II,” MSc, academic years 2015/16, 2016/17, 2017/18, 2018/19.
  • “Over-sampled Data Converters,” MSc, academic years 2013/14, 2014/15, 2015/16, 2016/17, 2017/18, 2018/19.
  • “Structured electronics,” MSc, academic years 2016/17, 2017/18.
  • “Design a chip,” BSc, academic years 2014/15, 2015/16, 2016/17, 2017/18, 2018/19.
  • “Linear circuits”, BSc, academic year 2014/15.

Professional courses/trainings

  • Lecturer for MEAD course “Smart Sensor Systems,” lecture title: “References for Smart sensors,” Delft, The Netherlands, 16-20 Apr. 2018.
  • Organizer and lecturer for a full-day seminar on quantum computing at the European Patent Office (EPO); lecture title: “Electronic interfaces for quantum processors,” Rijswijk, The Netherlands, 24 Oct. 2018.

International journal reviewer

Detailed statistics of my reviews are available on my Publons page

  • Nature Electronics, since 2019
  • Electronics Letters, since 2018
  • Journal of Applied Physics, since 2018
  • Quantum Science and Technology, since 2019
  • IEEE Journal of Solid-State Circuits (JSSC), since 2013
  • IEEE Solid-State circuits Letters, since 2018
  • IEEE Journal of the Electron Device Society, since 2019
  • IEEE Electron Device Letters, since 2018
  • IEEE Transactions on Circuits and Systems I (TCAS-I), since 2011
  • IEEE Transactions on Circuits and Systems II (TCAS-II), since 2013
  • IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), since 2013
  • IEEE Transactions on VLSI Systems (TVLSI), since 2015
  • IEEE Transactions on Instrumentation & Measurement, since 2018
  • Review of Scientific Instruments, since 2018
  • Sensors and Actuators A: Physical, since 2015
  • Sensors, since 2019

Academic activities

Thesis advisor – Ph.D. candidates

  • Ramon Overwater  (Ph.D., TU Delft); 9/2019 – present; Cryo-CMOS back-end.
  • Job van Staveren  (Ph.D., TU Delft); 1/2019 – present; Cryo-CMOS voltage reference and multiplexers.
  • Pascal ‘t Hart (Ph.D., TU Delft); 5/2017 – present; cryo-CMOS device characterization and modeling.
  • Jeroen van Dijk (Ph.D., TU Delft); 02/2016 – present; cryo-CMOS driver for spin qubits
  • Lorenzo Pedalá (Ph.D., TU Delft); 01/2014 – present; thermal-diffusivity-based frequency references.
  • Uğur Sönmez (Ph.D., TU Delft); 09/2013 – present; now at SiTime; thermal-diffusivity-based temperature sensors for microprocessor thermal management.
  • Federico Butti (Ph.D., University of Pisa, Italy); 04/2012 – 12/2012; now at Dialog Semiconductors; area-efficient instrumentation amplifier with high gain matching.

Thesis advisor – M.Sc. candidates

  • Maël Demarets (M.Sc., TU Delft); 8/2019 – now;  ultra-low-power on-chip oscillator.
  • Ríkarður Ragnarsson (M.Sc., TU Delft); 8/2019 – now; cryogenic SiGe BiCMOS amplifiers.
  • Tijmen van Eijk (M.Sc., TU Delft); 8/2019 – now; Scalable drive and counting electronics for SNSPD’s.
  • Dennis Kaandorp (M.Sc., TU Delft); 11/2015 – present; noise-based temperature sensors.
  • Ramon Overwater (M.Sc., TU Delft); 9/2018 – 8/2019; now at TU Delft; cryo-CMOS decoder for quantum error correction.
  • Pinakin Pedalia (M.Sc., TU Delft); 9/2018 – 8/2019; now at TU Delft; cryo-CMOS voltage references.
  • Job van Staveren (M.Sc., TU Delft); 9/2017 – 11/2018; now at TU Delft (see PhDs above); Cryo-CMOS voltage references.
  • Sriram Balamurali (M.Sc., TU Delft); 9/2017 – 11/2018; now at KU Leuven; cryo-CMOS LNA for RF readout of spin qubits.
  • Jaco Salentijn (M.Sc., TU Delft); 9/2017 – 11/2018; now at  Johnson Controls cryo-CMOS low drop-out (LDO) regulator.
  • Zhihao Zhou (M.Sc., TU Delft); 08/2016 – 11/2017; now at SiTime; ultra-low-power time reference.
  • Bahador ValizadehPasha (M.Sc., TU Delft); 09/2015 – 12/2016; now at University of Toronto; cryo-CMOS amplifier for DC readout of spin qubits.
  • Lin Song (M.Sc., TU Delft); 09/2015 – 9/2016; now at Analog Devices; characterization and modelling of cryo-CMOS devices.
  • Rosario Incandela (M.Sc., TU Delft); 09/2015 – 10/2016; now at TU Delft; cryo-CMOS LNA for RF readout of spin qubits.
  • Jeroen van Dijk (M.Sc., TU Delft); 09/2014 – 01/2016; now at TU Delft; noise-based temperature sensors.
  • Owoyinka Eniola (M.Sc., TU Delft); 09/2014 – 12/2015; now at NXP Semiconductors; cryogenic temperature
  • Wouter Brevet (M.Sc., TU Delft); 09/2013 – 11/2015; now at SensIXs; low-power CMOS wind sensor.
  • Burak Gonen (M.Sc., TU Delft); 09/2013 – 10/2014; now at TU Delft; high-resolution zoom ADC for dynamic signals.
  • Rui Quan (M.Sc., TU Delft); 09/2013 – 10/2014; now at NXP Semiconductors; thermal-diffusivity-based temperature sensor employing a VCO-based integrator.
  • Onur Kaya (M.Sc., TU Delft); 09/2009 – 11/2010; now at ASML; precision RC-locked reference oscillator.
  • Qinwen Fan (M.Sc., cum laude, TU Delft); 09/2007 – 08/2008; now at TU Delft; instrumentation amplifier for biopotential applications.

Thesis advisor – B.Sc. and HBO candidates

During my industrial experience, I tutored several B.Sc. and applied sciences students during their internship in the research department at NXP Semiconductors in Eindhoven.

  • Subash Parajuli (HBO, Fontys University of Applied Sciences, Eindhoven); 02/2013 – 07/2013; now at ASML; system for offset estimation for magnetic sensors.
  • Labrinus van Manen (B.Sc., University of Twente); 10/2012 – 12/2012; now at University of Twente; algorithms for offset estimation for magnetic sensors.
  • Aditya Halim (HBO, Fontys University of Applied Sciences, Eindhoven); 02/2012 – 06/2012; now at NXP Semiconductors; LabVIEW automated tests for ADCs.
  • Rabindra Rijal (HBO, Fontys University of Applied Sciences, Eindhoven); 02/2011 – 06/2011; now at NXP Semiconductors; LabVIEW automated sensor measurement setup.

Personal

Languages

Italian

mothertongue


English

fluent


Dutch

intermediate, A2 level


References

[1] [doi] R. Quan, U. Sonmez, and K. M. A. A. Fabio Sebastiano and, “A 4600µm² 1.5°C (3σ) 0.9kS/s thermal-diffusivity temperature sensor with VCO-based readout,” in International Solid-state Circuits Conference Digest of Technical Papers, San Francisco, CA, 2015, pp. 488-489.
[Bibtex]
@INPROCEEDINGS{mine:isscc_2015_TD_sensor,
author={Rui Quan and Ugur Sonmez and Fabio Sebastiano and, Kofi A.A. Makinwa},
booktitle={International Solid-state Circuits Conference Digest of Technical Papers},
address="San Francisco, CA",
title={A 4600µm² 1.5°C (3σ) 0.9{kS/s} thermal-diffusivity temperature sensor with VCO-based readout},
year={2015},
month={Feb},
pages={488 - 489},
abstract={This paper presents a highly digital thermal-diffusivity temperature sensor in 0.16µm CMOS for SoC thermal monitoring. The sensor occupies only 4600µm², which is the smallest for designs above 32nm and is one of the smallest ever reported. It also achieves ±1.5°C (3σ, single trim) inaccuracy and 0.6$^circ$C resolution at a 0.9kS/s sampling rate. This small area implementation is mainly enabled by the adoption of a VCO-based phase-domain ADC whose area is 70% digital.},
keywords={Accuracy;CMOS integrated circuits;Modulation;Radiation detectors;Temperature sensors},
doi={10.1109/ISSCC.2015.7063139},}
[2] [doi] U. Sönmez, F. Sebastiano, and K. A. A. Makinwa, “1650µm² Thermal-Diffusivity Sensors with Inaccuracies Down to ±0.75$^\circ$C in 40nm CMOS,” in International Solid-state Circuits Conference Digest of Technical Papers, San Francisco, CA, 2016, pp. 206-207.
[Bibtex]
@INPROCEEDINGS{mine:isscc_2016_ugur,
author={Ugur Sönmez and Fabio Sebastiano and Kofi A.A. Makinwa},
booktitle={International Solid-state Circuits Conference Digest of Technical Papers},
address="San Francisco, CA",
title="1650µm² Thermal-Diffusivity Sensors with Inaccuracies Down to ±0.75$^\circ$C in 40nm {CMOS}",
year={2016},
pages={206-207},
abstract={This work presents a thermal diffusivity (TD) sensor realized in nanometer (40nm) CMOS that demonstrates that the performance of such sensors continues to improve with scaling. Without trimming, the sensor achieves 1.4C (3s) inaccuracy from -40 to 125C, which is a 5 improvement over previous (non-TD) sensors intended for thermal monitoring. This improves to 0.75C (3s) after a single-point trim, a level of accuracy that previously would have required two-point trimming. Furthermore, it operates from supply voltages as low as 0.9V, and occupies only 1650 m2, making it one of the smallest smart temperature sensors reported to date. These advances are enabled by the use of a phase-calibration scheme and a highly digital phase-domain ?S ADC.},
keywords={CMOS integrated circuits;calibration;delta-sigma modulation;temperature sensors;thermal diffusivity;CMOS;digital phase-domain ?S ADC;phase-calibration scheme;scaling;single-point trim;size 40 nm;smart temperature sensors;temperature -40 degC to 125 degC;thermal monitoring;thermal-diffusivity sensors;CMOS integrated circuits;Monitoring;Radiation detectors;Temperature measurement;Temperature sensors},
doi={10.1109/ISSCC.2016.7417979},
month={Jan}}
[3] Unknown bibtex entry with key [mine:isscc_2016_burak ]
[Bibtex]
[4] [doi] F. Sebastiano, F. Butti, R. H. M. van Veldhoven, and P. Bruschi, “A 0.07mm² 2-Channel Instrumentation Amplifier with 0.1% Gain Matching in 0.16µm CMOS,” in International Solid-state Circuits Conference Digest of Technical Papers, San Francisco, CA, 2014, pp. 294-295.
[Bibtex]
@inproceedings{mine:isscc_2014_amplifier,
author = "Fabio Sebastiano and Federico Butti and Robert H.M. van Veldhoven and Paolo Bruschi",
month = feb # {9--13},
year = "2014",
title="A 0.07mm² 2-Channel Instrumentation Amplifier with 0.1% Gain Matching in 0.16µm {CMOS}",
booktitle={International Solid-state Circuits Conference Digest of Technical Papers},
pages={294 - 295},
abstract={Extremely small-area sensor front-ends are required for cost-constrained automotive applications. Instrumentation amplifiers (IA) for such front-ends must process multi-channel sensor outputs and provide gain matching over the channels for proper sensor operation. Angular sensors are a typical example, in which the sine and cosine outputs of a resistive magnetic sensor must be processed with adequate gain matching to avoid unacceptable angular errors. This paper presents a 2-channel instrumentation amplifier in 0.16µm CMOS with 0.1% gain matching and occupying 0.035mm2 per channel. This represents a 13.3x area improvement with respect to state-of-the-art designs with similar gain accuracy [1]-[4], while maintaining low noise (18.7nV/√Hz), low offset (17µV) and high power efficiency (NEF=12.9). The accurate gain matching in a limited area is enabled by the adoption of a dynamic element matching (DEM) scheme and by the use of a high chopping frequency.},
keywords={CMOS integrated circuits;instrumentation amplifiers;2-channel instrumentation amplifier;CMOS;DEM scheme;IA;angular sensors;cosine outputs;cost-constrained automotive applications;dynamic element matching scheme;gain matching;high chopping frequency;multichannel sensor outputs;resistive magnetic sensor;sensor front-ends;sensor operation;size 0.16 mum;voltage 17 muV;Accuracy;CMOS integrated circuits;Gain measurement;Instruments;Noise measurement;Solid state circuits;Switches},
address="San Francisco, CA",
doi={10.1109/ISSCC.2014.6757440},
ISSN={0193-6530},
}
[5] [doi] F. Sebastiano and R. H. M. van Veldhoven, “A 0.1-mm² 3-Channel Area-Optimized ΣΔ ADC in 0.16-µm CMOS with 20-kHz BW and 86-dB DR,” in Proc. European Solid-State Circuits Conference, Bucharest, Romania, 2013, pp. 375-378.
[Bibtex]
@INPROCEEDINGS{mine:esscirc_2013_sigmadelta,
author = "Fabio Sebastiano and Robert H.M. van Veldhoven",
booktitle="Proc. {European Solid-State Circuits Conference}",
title="A 0.1-mm² 3-Channel Area-Optimized ΣΔ {ADC} in 0.16-µm {CMOS} with {20-kHz} {BW} and {86-dB DR}",
year={2013},
month=sep # {16--20},
address="Bucharest, Romania",
pages={375 - 378},
abstract={Front-ends for automotive sensors must digitize multiple channels with high resolution while minimizing their silicon area to save costs. Both channel latency and inter-channel gain mismatch must be minimized to be able to serve multiple sensor applications, ranging from ABS to power steering, with the same front-end. The proposed S? ADC simultaneously digitizes 3 channels, each with a DR of 86 dB over a 20-kHz BW using a 75-MHz clock. Channel latency is <40 ns and inter-channel gain mismatch is <0.2%. The ADC occupies only 0.1 mm² in a 0.16-µm CMOS process. The small area is enabled by channel multiplexing, allowing component sharing among the channels, and by the large oversampling ratio (OSR), allowing for smaller capacitors.},
keywords={CMOS integrated circuits;analogue-digital conversion;automotive electronics;delta-sigma modulation;3-channel area-optimized S? ADC;CMOS;automotive sensors;capacitors;channel latency;channel multiplexing;frequency 20 kHz;frequency 75 MHz;front-ends;inter-channel gain mismatch;oversampling ratio;size 0.16 mum;Capacitors;Crosstalk;Gain;Modulation;Multiplexing;Noise;Sensors},
doi={10.1109/ESSCIRC.2013.6649151},
ISSN={1930-8833}
}
[6] [doi] S. Ersoy, R. H. M. van Veldhoven, F. Sebastiano, and K. Reimann, "A 0.25mm² AC-Biased MEMS Microphone Interface with 58dBA SNR," in International Solid-state Circuits Conference Digest of Technical Papers, San Francisco, CA, 2013, pp. 382-383.
[Bibtex]
@inproceedings{mine:isscc_2013_selcuk,
author = "Sel\c{c}uk Ersoy and Robert H.M. van Veldhoven and Fabio Sebastiano and Klaus Reimann",
month = feb # {17--21},
year = "2013",
title="A 0.25mm² {AC}-Biased {MEMS} Microphone Interface with {58dBA SNR}",
booktitle={International Solid-state Circuits Conference Digest of Technical Papers},
pages="382-383",
address="San Francisco, CA",
abstract={Capacitive MEMS microphone roadmaps are mainly driven by increasing SNR and reducing size/cost. This requires smaller microphones, ASICs with lower noise and smaller area, and cheaper packaging. Because of fundamental limitations, traditional DC-biased microphones will have difficulty following these trends. This paper proposes an AC-biasing scheme, which leads to a significant reduction in ASIC size and module packaging cost.},
keywords={AC machines;DC machines;capacitance;electronics packaging;micromechanical devices;microphones;AC-biased MEMS microphone interface;AC-biasing scheme;ASIC size reduction;DC-biased microphone;SNR;capacitive MEMS microphone roadmap;module packaging cost;noise},
doi={10.1109/ISSCC.2013.6487779},
ISSN={0193-6530}
}
[7] F. Sebastiano, L. J. Breems, and K. A. A. Makinwa, Mobility-based Time References for Wireless Sensor Networks, Springer, 2013.
[Bibtex]
@book{mine:book_mobility,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa",
title = "Mobility-based Time References for Wireless Sensor Networks",
publisher = "Springer",
year = "2013",
abstract  = {This book describes the use of low-power low-cost and extremely small radios to provide essential time reference for wireless sensor networks. The authors explain how to integrate such radios in a standard CMOS process to reduce both cost and size, while focusing on the challenge of designing a fully integrated time reference for such radios. To enable the integration of the time reference, system techniques are proposed and analyzed, several kinds of integrated time references are reviewed, and mobility-based references are identified as viable candidates to provide the required accuracy at low-power consumption. Practical implementations of a mobility-based oscillator and a temperature sensor are also presented, which demonstrate the required accuracy over a wide temperature range, while drawing 51-µW from a 1.2-V supply in a 65-nm CMOS process.}
}
[8] [doi] F. Sebastiano, L. J. Breems, K. A. A. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios," IEEE J. Solid-State Circuits, vol. 44, iss. 7, pp. 2002-2009, 2009.
[Bibtex]
@article{mine:jssc_2009_mobility,
title="A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less {ULP} Radios",
author="Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa and Salvatore Drago and Domine M.W. Leenaerts and Bram Nauta",
journal=IEEE_J_JSSC,
year={2009},
month=jul,
volume={44},
number={7},
pages={2002 -2009},
abstract={The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for application in wireless sensor networks (WSN). After a single-point calibration, the spread of its output frequency is less than 1.1% (3σ) over the temperature range from -22 °C to 85 °C . Fabricated in a baseline 65 nm CMOS technology, the frequency reference circuit occupies 0.11 mm² and draws 34 µA from a 1.2 V supply at room temperature.},
keywords={CMOS integrated circuits;MOSFET;wireless sensor networks;CMOS technology;MOS transistor;crystal-less ULP radios;current 34 muA;electron mobility;frequency 100 kHz;low-voltage low-power circuit;low-voltage mobility-based frequency reference;size 65 nm;temperature -22 degC to 85 degC;temperature 293 K to 298 K;voltage 1.2 V;wireless sensor networks;CMOS technology;Circuits;Electron mobility;Energy consumption;Frequency synchronization;MOSFETs;Oscillators;Silicon;Temperature sensors;Wireless sensor networks;CMOS analog integrated circuits;Charge carrier mobility;crystal-less clock;low voltage;relaxation oscillators;ultra-low power;wireless sensor networks},
doi={10.1109/JSSC.2009.2020247},
ISSN={0018-9200},
}
[9] [doi] F. Sebastiano, L. J. Breems, K. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks," IEEE J. Solid-State Circuits, vol. 46, iss. 7, pp. 1544-1552, 2011.
[Bibtex]
@ARTICLE{mine:jssc_2011_mobility_comp,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi Makinwa and Salvatore Drago and Domine M. W. Leenaerts and Bram Nauta",
journal=IEEE_J_JSSC,
title="A 65-nm {CMOS} temperature-compensated mobility-based frequency reference for Wireless Sensor Networks",
year={2011},
month=jul,
volume={46},
number={7},
pages={1544 - 1552},
abstract={A temperature-compensated CMOS frequency reference based on the electron mobility in a MOS transistor is presented. Over the temperature range from -55 °C to 125 °C, the frequency spread of the complete reference is less than ±0.5% after a two-point trim and less than ±2.7% after a one-point trim. These results make it suitable for use in Wireless Sensor Network nodes. Fabricated in a baseline 65-nm CMOS process, the 150 kHz frequency reference occupies 0.2 mm² and draws 42.6 µA from a 1.2-V supply at room temperature.},
keywords={CMOS integrated circuits;compensation;electron mobility;wireless sensor networks;MOS transistor;current 42.6 muA;electron mobility;mobility-based frequency reference;size 65 nm;temperature -55 degC to 125 degC;temperature-compensated CMOS frequency reference;two-point trim;voltage 1.2 V;wireless sensor networks;Accuracy;Frequency conversion;Oscillators;Temperature;Temperature measurement;Temperature sensors;Wireless sensor networks;CMOS integrated circuits;Charge carrier mobility;MOSFET;crystal-less clock;frequency reference;low voltage;sigma-delta modulation;smart sensors;temperature compensation;temperature sensors;ultra-low power;wireless sensor networks},
doi={10.1109/JSSC.2011.2143630},
ISSN={0018-9200}
}
[10] [doi] F. Sebastiano, S. Drago, L. J. Breems, D. M. W. Leenaerts, K. A. A. Makinwa, and B. Nauta, "Impulse Based Scheme for Crystal-less ULP Radios," in Proc. IEEE International Symposium on Circuits and Systems, 2008, pp. 1508-1511.
[Bibtex]
@inproceedings{mine:iscas_2008_wsn,
author = "Fabio Sebastiano and Salvatore Drago and Lucien J. Breems and Domine M.W. Leenaerts and Kofi A.A. Makinwa and Bram Nauta",
month = may # {18--21},
year = "2008",
title = "Impulse Based Scheme for Crystal-less {ULP} Radios",
booktitle = "Proc. {IEEE International Symposium on Circuits and Systems}",
pages="1508 - 1511",
abstract={This study describes a method of implementing a fully integrated ultra-low-power (ULP) radio for wireless sensor networks (WSNs). This is achieved using an ad hoc modulation scheme (impulse radio), with a bandwidth of 17.7 MHz in the 2.4 GHz-ISM band and a specific medium access control (MAC) protocol, based on a duty-cycled wake-up radio and a crystal-less clock generator. It is shown that the total average power consumption is expected to be less than 100 µW with a clock generator inaccuracy of only 1%.},
keywords={access protocols;ad hoc networks;clocks;low-power electronics;modulation;ultra wideband communication;wireless sensor networks;ad hoc modulation;crystal-less ULP radio;crystal-less clock generator;duty-cycled wake-up radio;frequency 17.7 MHz;frequency 2.4 GHz;impulse radio;medium access control protocol;power 100 muW;ultra-low-power radio;wireless sensor network;Crystal-less clock;EDICS Category: COMM110A5, COMM200, COMM250A5;impulse radio;ultra-low power (ULP);wake-up radio;wireless sensor network (WSN)},
doi={10.1109/TCSI.2009.2015208},
}
[11] [doi] F. Sebastiano, L. J. Breems, K. A. A. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less ULP Radios," in Proc. European Solid-State Circuits Conference, Edinburgh, UK, 2008, pp. 306-309.
[Bibtex]
@inproceedings{mine:esscirc_2008_mobility,
title="A Low-Voltage Mobility-Based Frequency Reference for Crystal-Less {ULP} Radios",
author="Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa and Salvatore Drago and Domine M.W. Leenaerts and Bram Nauta",
booktitle="Proc. {European Solid-State Circuits Conference}",
year="2008",
pages="306 - 309",
month=sep # {15--19},
address="Edinburgh, UK",
abstract={The design of a 100 kHz frequency reference based on the electron mobility in a MOS transistor is presented. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for Wireless Sensor Networks (WSN) applications. After one-point calibration the spread of its output frequency is less than 1.1% (3σ) over the temperature range from -22 °C to 85 °C. Fabricated in a baseline 65-nm CMOS technology, the frequency reference occupies 0.11 mm² and draws 34 µA from a 1.2-V supply at room temperature.},
keywords={CMOS integrated circuits;MOSFET circuits;electron mobility;integrated circuit design;low-power electronics;mobile radio;wireless sensor networks;MOS transistor;crystal less ULP radios;electron mobility;frequency 100 kHz;low voltage mobility based frequency reference;off-chip components;one point calibration;size 65 nm;temperature -22 degC to 85 degC;voltage 1.2 V;wireless sensor networks;CMOS technology;Calibration;Circuits;Energy consumption;Frequency;Oscillators;Silicon;Temperature distribution;Temperature sensors;Wireless sensor networks},
doi={10.1109/ESSCIRC.2008.4681853},
ISSN={1930-8833}
}
[12] F. Sebastiano, L. J. Breems, K. A. A. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "On the Temperature Compensation of a Frequency Reference for Crystal-Less ULP Wireless Sensor Networks," in Proc. ProRISC, Veldhoven, The Netherlands, 2008, pp. 306-309.
[Bibtex]
@inproceedings{mine:prorisc_2008_mobility,
author="Fabio Sebastiano and Lucien J. Breems and Kofi A.A. Makinwa and Salvatore Drago and Domine M.W. Leenaerts and Bram Nauta",
title="On the Temperature Compensation of a Frequency Reference for Crystal-Less {ULP} Wireless Sensor Networks",
booktitle="Proc. {ProRISC}",
year="2008",
pages="306 - 309",
month=sep # {27--18},
address="Veldhoven, The Netherlands",
abstract={Each node in a Wireless Sensor Network (WSN) must be provided with a frequency reference to enable network synchronization and RF communication. As the nodes need to be small, cheap and energy efcient, a frequency reference suitable for WSN must show low power consumption and require no off-chip components. A reference based on electron mobility in a MOS transistor demonstrates such features. Its output frequency follows the temperature dependence of mobility, which, although large, is well dened and can be compensated for. It is shown that a temperature sensor with accuracy of only 0.6 °C can be employed for the temperature compensation and that the inaccuracy of a compensated mobility-based frequency reference due to temperature, process spread, voltage supply variations and noise can be as low as 1% on a wide temperature range, fitting radio architectures for WSN applications.}
}
[13] [doi] F. Sebastiano, L. J. Breems, K. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "A 65-nm CMOS temperature-compensated mobility-based frequency reference for Wireless Sensor Networks," in Proc. European Solid-State Circuits Conference, Sevilla, Spain, 2010, pp. 102-105.
[Bibtex]
@INPROCEEDINGS{mine:esscirc_2010_mobility_comp,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi Makinwa and Salvatore Drago and Domine M. W. Leenaerts and Bram Nauta",
booktitle="Proc. {European Solid-State Circuits Conference}",
title="A 65-nm {CMOS} temperature-compensated mobility-based frequency reference for Wireless Sensor Networks",
year={2010},
month=sep # {14--16},
pages={102 - 105},
address="Sevilla, Spain",
abstract={For the first time, a temperature-compensated CMOS frequency reference based on the electron mobility in a MOS transistor is presented. Over the temperature range from -55 °C to 125 °C, its frequency spread is less than ±0.5% after a two-point trim and less than ±2.7% after a one-point trim. These results make it suitable for use in Wireless Sensor Network nodes. Fabricated in a baseline 65-nm CMOS process, the 150 kHz frequency reference occupies 0.2 mm² and draws 42.6 µA from a 1.2-V supply at room temperature.},
keywords={CMOS integrated circuits;MOSFET;electron mobility;wireless sensor networks;CMOS temperature-compensated mobility;MOS transistor;current 42.6 muA;electron mobility;frequency 150 kHz;frequency reference;size 65 nm;temperature -55 C to 125 C;voltage 1.2 V;wireless sensor network;Accuracy;CMOS integrated circuits;Calibration;Oscillators;Temperature measurement;Temperature sensors;Wireless sensor networks},
doi={10.1109/ESSCIRC.2010.5619792},
ISSN={1930-8833}
}
[14] [doi] F. Sebastiano, L. J. Breems, K. Makinwa, S. Drago, D. M. W. Leenaerts, and B. Nauta, "Effects of Packaging and Process Spread on a Mobility-Based Frequency Reference in 0.16-µm CMOS," in Proc. European Solid-State Circuits Conference, Helsinki, Finland, 2011, pp. 511-514.
[Bibtex]
@INPROCEEDINGS{mine:esscirc_2011_mobility_cmos14,
author = "Fabio Sebastiano and Lucien J. Breems and Kofi Makinwa and Salvatore Drago and Domine M. W. Leenaerts and Bram Nauta",
booktitle="Proc. {European Solid-State Circuits Conference}",
title="Effects of Packaging and Process Spread on a Mobility-Based Frequency Reference in 0.16-µm {CMOS}",
year={2011},
month=sep # {12-16},
address="Helsinki, Finland",
pages={511 - 514},
abstract={In this paper, we explore the robustness of frequency references based on the electron mobility in a MOS transistor by implementing them with both thin-oxide and thick-oxide MOS transistors in a 0.16-µm CMOS process, and by testing samples packaged in both ceramic and plastic packages. The proposed low-voltage low-power circuit requires no off-chip components, making it suitable for applications requiring fully integrated solutions, such as Wireless Sensor Networks. Over the temperature range from -55 °C to 125 °C, its frequency spread is less than ±1% (3σ) after a one-point trim. Fabricated in a baseline 0.16-µm CMOS process, the 50 kHz frequency reference occupies 0.06 mm² and, at room temperature, its consumption with a 1.2-V supply is less than 17 µW.},
keywords={CMOS integrated circuits;MOSFET;ceramic packaging;electron mobility;low-power electronics;plastic packaging;reference circuits;wireless sensor networks;CMOS process;ceramic packages;electron mobility;frequency 50 kHz;low-voltage low-power circuit;mobility-based frequency reference;off-chip components;packaging;plastic packages;process spread;size 0.16 mum;temperature -55 degC to 125 degC;temperature 293 K to 298 K;thick-oxide MOS transistors;thin-oxide MOS transistors;voltage 1.2 V;wireless sensor networks;Accuracy;Ceramics;Oscillators;Plastics;Temperature distribution;Temperature measurement;Transistors},
doi={10.1109/ESSCIRC.2011.6044934},
ISSN={1930-8833}
}
[15] [doi] Q. Fan, F. Sebastiano, J. H. Huijsing, and K. A. A. Makinwa, "A 1.8µW 1-µV-offset capacitively-coupled chopper instrumentation amplifier in 65nm CMOS," in Proc. European Solid-State Circuits Conference, Sevilla, Spain, 2010, pp. 170-173.
[Bibtex]
@INPROCEEDINGS{mine:esscirc_2010_qinwen,
author="Qinwen Fan and Fabio Sebastiano and Johan H. Huijsing and Kofi A.A. Makinwa",
booktitle="Proc. {European Solid-State Circuits Conference}",
title="A 1.8µ{W} 1-µV-offset capacitively-coupled chopper instrumentation amplifier in 65nm {CMOS}",
year={2010},
month=sep # {14--16},
address="Sevilla, Spain",
pages={170 - 173},
abstract={This paper describes a precision capacitively-coupled chopper instrumentation amplifier (CCIA). It achieves 1µV offset, 134dB CMRR, 120dB PSRR, 0.16% gain accuracy and a noise efficiency factor (NEF) of 3.1, which is more than 3x better than state-of-the-art. It has a rail-to-rail DC common-mode (CM) input range. Furthermore, a positive feedback loop (PFL) is used to boost the input impedance, and a ripple reduction loop (RRL) is used to reduce the ripple associated with chopping. The CCIA occupies only 0.1mm² in a 65nm CMOS technology. It can operate from a 1V supply, from which it draws only 1.8µA.},
keywords={CMOS integrated circuits;instrumentation amplifiers;CMOS;input impedance;noise efficiency factor;positive feedback loop;precision capacitively-coupled chopper instrumentation amplifier;rail-to-rail DC common-mode input range;ripple reduction loop;size 65 nm;Accuracy;Choppers;Impedance;Instruments;Noise;Resistors;Topology},
doi={10.1109/ESSCIRC.2010.5619902},
ISSN={1930-8833}
}
[16] [doi] Q. Fan, F. Sebastiano, J. H. Huijsing, and K. A. A. Makinwa, "A 2.1 µW Area-Efficient Capacitively-Coupled Chopper Instrumentation Amplifier for ECG Applications in 65 nm CMOS," in Proc. Asian Solid-State Circuits Conference, Beijing, China, 2010, pp. 1-4.
[Bibtex]
@INPROCEEDINGS{mine:asscc_2010_qinwen,
author="Qinwen Fan and Fabio Sebastiano and Johan H. Huijsing and Kofi A.A. Makinwa",
booktitle="Proc. {Asian Solid-State Circuits Conference}",
title="A 2.1 µ{W} Area-Efficient Capacitively-Coupled Chopper Instrumentation Amplifier for ECG Applications in 65 nm {CMOS}",
year={2010},
month=nov # {8--10},
address="Beijing, China",
pages={1 - 4},
abstract={This paper describes a capacitively-coupled chopper instrumentation amplifier for use in electrocardiography (ECG). The amplifier's gain is accurately defined by a capacitive feedback network, while a DC servo loop rejects the DC offset generated by the electrode-tissue interface. The high-pass corner frequency established by the servo loop is realized by an area-efficient switched-capacitor integrator. Additional feedback loops are employed to boost the amplifier's input-impedance to 80 MΩ and to suppress the chopper ripple. Implemented in a 65 nm CMOS technology, the amplifier draws 2.1 µA from a 1 V supply and occupies 0.2 mm².},
keywords={CMOS integrated circuits;amplifiers;biomedical electrodes;choppers (circuits);electrocardiography;CMOS technology;DC servo loop;ECG application;area efficient chopper instrumentation amplifier;capacitive feedback network;capacitively coupled chopper instrumentation amplifier;electrocardiography;electrode-tissue interface;power 2.1 muW;switched capacitor integrator;Choppers;DSL;Earth Observing System;Electrocardiography;Impedance;Instruments;Noise},
doi={10.1109/ASSCC.2010.5716624}
}
[17] [doi] Q. Fan, F. Sebastiano, J. H. Huijsing, and K. A. A. Makinwa, "A 1.8 µW 60 nV/√Hz Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm CMOS for Wireless Sensor Nodes," IEEE J. Solid-State Circuits, vol. 46, iss. 7, pp. 1534-1543, 2011.
[Bibtex]
@ARTICLE{mine:jssc_2011_qinwen,
author="Qinwen Fan and Fabio Sebastiano and Johan H. Huijsing and Kofi A.A. Makinwa",
journal=IEEE_J_JSSC,
title="A 1.8 µ{W} 60 nV/√{Hz} Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm {CMOS} for Wireless Sensor Nodes",
year={2011},
month=jul,
volume={46},
number={7},
pages={1534 - 1543},
abstract={This paper presents a low-power precision instrumentation amplifier intended for use in wireless sensor nodes. It employs a capacitively-coupled chopper topology to achieve a rail-to-rail input common-mode range as well as high power efficiency. A positive feedback loop is employed to boost its input impedance, while a ripple reduction loop suppresses the chopping ripple. To facilitate bio-potential sensing, an optional DC servo loop may be employed to suppress electrode offset. The IA achieves 1 µV offset, 0.16% gain inaccuracy, 134 dB CMRR, 120 dB PSRR and a noise efficiency factor of 3.3. The instrumentation amplifier was implemented in a 65 nm CMOS technology. It occupies only 0.1 mm² chip area (0.2 mm² with the DC servo loop) and consumes 1.8 µA current (2.1 µA with the DC servo loop) from a 1 V supply.},
keywords={CMOS integrated circuits;choppers (circuits);instrumentation amplifiers;wireless sensor networks;CMOS technology;CMRR;DC servo loop;PSRR;biopotential sensing;capacitively-coupled chopper instrumentation amplifier;chopping ripple;current 1.8 muA;electrode offset suppression;low-power precision instrumentation amplifier;noise efficiency factor;positive feedback loop;power 1.8 muW;rail-to-rail input common-mode range;ripple reduction loop;size 65 nm;voltage 1 V;wireless sensor nodes;Capacitors;Choppers;Impedance;Noise;Sensors;Topology;Wireless sensor networks;Bio-signal sensing;chopping;high power efficiency;low offset;low power;precision amplifier;wireless sensor nodes},
doi={10.1109/JSSC.2011.2143610},
ISSN={0018-9200}
}